1. Field of the Invention
The present invention generally relates to a display device and a method of operating the same, and in particular relates to an improvement of data transfer inside a hold-type display device.
2. Description of the Related Art
In a liquid crystal display device, a voltage once written in each pixel electrode is held until the corresponding scanning line is next selected, so that transmitted light is kept constant during one frame period. Hence, whereas a CRT (cathode ray tube) is called as an impulse-type display device, the liquid crystal display device is called as hold-type display device.
It has been considered that a motion blur in displaying a moving image results from a slow response speed of liquid crystal in the liquid crystal display panel; however, it has been known recently that there the motion blur is inherently caused in a hold-type display device even though the response speed of the liquid crystal is improved.
In order to suppress such the motion blur inherent in the hold-type display, two approaches have been proposed: one proposed approach is to insert a black frame between every two adjacent frame images and the other is to insert one or more interpolation frame images between every two adjacent frame images, the interpolation frame image(s) being generated by interpolation on the basis of the motion vector between the two adjacent frame images. The insertion of black frames is disclosed in the following documents: Japanese Patent Application Publications Nos. P2002-215111A, P2009-165161A and Japanese Patent Gazette No. 4079793 B, N. Kimura et al., “New Technologies for Large-Sized High Quality LCD TV”, SID05 Digest, p. 1735, K. Ono et al., SID06 Digest, “Progress of IPS-Pro Technology for LCD TV”, p. 1954, and T. S. Kim et al., “Impulsive Driving Technique in S-PVA Architecture”, SID06 Digest p. 1709. The insertion of the interpolation frame images is disclosed in Sang Soo Kim et al., “Distinguished Paper: Novel TFT-LCD Technology for Motion Blur Reduction Osing 120 Hz Driving with McFi”, SID07 Digest p. 1003.
These driving methods, in which one or more additional frame image is inserted in every two adjacent frame images, are referred to as multiplied-speed driving, because the frame frequency is 120 Hz or more, whereas the conventional frame frequency is 60 Hz. It should be noted here that, the term “multiplied-speed driving” means a display panel driving at a frequency of N times of the conventional frame frequency (N being an integer of 2 or more) in the specification of the present application. It should be also noted that, the term “multiplied-speed drive processing” means image data processing in which an additional frame image(s) is inserted into every two frame images with the frame frequency of 60 Hz, in order to achieve the multiplied-speed driving.
FIG. 1 is a block diagram showing an example of the configuration of a liquid crystal display device 101 adapted to the multiplied-speed driving. The liquid crystal display device 101 is configured to receive image data 111 and synchronous signals 112 from an image rendering unit 102 (e.g., CPU) and to display images in response to the image data 111 and the synchronous signals 112. In this configuration, the synchronous signals 112 are a set of control signals used for timing control of the liquid crystal display device 101, including a horizontal synchronous signal Hsync and a vertical synchronous signal Vsync.
In detail, the liquid crystal display device 101 includes a multiplied-speed drive processing circuit 103, a frame memory 104, a timing controller 105, a gate driver 106, a data driver 107, reference grayscale voltage generator 108 and a liquid crystal display panel 109.
The multiplied-speed drive processing circuit 103 performs multiplied-speed drive processing on the image data 111 to thereby produce multiplied-speed drive image data 113. More specifically, the multiplied-speed drive processing circuit 103 produces a frame image to be additionally inserted from every two adjacent frame images contained in the image data 111, and produces image data with the produced frame image inserted therein as multiplied-speed drive image data 113. The frame image to be inserted may be a black image or a frame image obtained by interpolating corresponding two adjacent frame images. In addition, the multiplied-speed drive processing circuit 103 produces multiplied-speed drive processing synchronous signals 114 of formats adapted to the multiplied-speed display driving from the synchronous signals 112. The multiplied-speed drive processing circuit 103 uses the frame memory 104 as a work area for producing the multiplied-speed drive image data 113.
The timing controller 105 controls the operations of the respective components integrated within the liquid crystal display device 101. More specifically, the timing controller 105 receives the multiplied-speed drive image data 113 from the multiplied-speed drive processing circuit 103 and transfers the same to the data driver 107. Further, the timing controller 105 produces gate control signals 115 and data control signals 116 based on the multiplied-speed drive processing synchronous signals 114. The gate control signals 115 are supplied to the gate driver 106 and the data control signals 116 are supplied to the data driver 107.
The gate driver 106 drives the gate lines of the liquid crystal display panel 109 in response to the gate control signals 115, and the data driver 107 drives the data lines of the liquid crystal display panel 109 in response to the multiplied-speed drive image data 113 and the data control signals 116. The reference grayscale voltage generator 108 produces reference grayscale voltages V0 to Vm and supplies the same to the data driver 107 for controlling the relation between the grayscale level of each pixel described in the multiplied-speed drive image data 113 and the voltage level of the drive voltage with which each of the data lines is actually driven.
One drawback of a liquid crystal display device performing multiplied-speed driving is that the amount of the transferred image data is increased (for example, doubled) within the liquid crystal display device due to the multiplied-speed processing. More specifically, for example, in a case where a liquid crystal display panel has the number of pixels corresponding to the Full-HD (high definition) display, the amount of transferred image data from the timing controller to the data driver is determined depending on whether or not the multiplied-speed driving is performed as follows:    (1) Not executing the multiplied-speed driving1920×1080×24 bits×60 Hz=2.986 Gbps    (2) Executing the multiplied-speed driving1920×1080×24 bits×120 Hz=5.972 Gbps
If the amount of transferred image data is increased, a high speed data transfer is required in the liquid crystal display device, and this may cause EMI (electromagnetic interference) from the data transfer line and increase the power consumption. In the liquid crystal display device 101 shown in FIG. 1, for example, a high speed data transfer is required for transferring the multiplied-speed drive image data 113 from the multiplied-speed drive processing circuit 103 to the timing controller 105 and transferring the multiplied-speed drive image data 113 from the timing controller 105 to the data driver 107. In addition, there arises a necessity of mounting a high speed interface for implementing a high speed data transfer to the data driver 107 or increasing the number of the data transfer lines connected to the data driver 107.